ATtiny85 Template Code
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uart_recv.c
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/*--------------------------------------------------------------------------*
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* UART interface implementation for ATmega
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*---------------------------------------------------------------------------*
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* 01-Apr-2014 ShaneG
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*
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* Half-duplex 8N1 serial UART in software.
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*
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* 1%/2% Tx/Rx timing error for 115.2kbps@8Mhz
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* 2%/1% Tx/Rx timing error for 230.4kbps@8Mhz
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*
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* Uses only one pin on the AVR for both Tx and Rx:
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*
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* D1
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* AVR ----+--|>|-----+----- Tx
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* | 10K $ R1
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* +--------(/^\)--- Rx
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* NPN E C
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*--------------------------------------------------------------------------*/
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include "../hardware.h"
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#include "
uart_defs.h
"
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#include "
softuart.h
"
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// Only if enabled
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#ifdef UART_ENABLED
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//--- Set up input buffer if applicable
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#ifdef UART_INTERRUPT
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static
uint8_t g_buffer[
UART_BUFFER
];
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static
volatile
uint8_t g_index = 0;
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#endif
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uint8_t
uartAvail
() {
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#ifndef UART_INTERRUPT
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return
0;
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#else
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return
g_index;
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#endif
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}
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char
uartRecv
() {
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char
ch;
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#ifdef UART_INTERRUPT
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// Wait for a character
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while
(g_index==0);
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cli();
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// Return the first character in the buffer
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ch = g_buffer[0];
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g_index--;
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// Move everything down
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for
(uint8_t index=0; index<g_index; g_buffer[index] = g_buffer[index + 1], index++);
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// Done
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sei();
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#else
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// Set as input and disable pullup
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DDRB &= ~(1 <<
UART_RX
);
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PORTB &= ~(1 <<
UART_RX
);
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// Read the byte
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cli();
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asm
volatile
(
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" ldi r18, %[rxdelay2] \n\t"
// 1.5 bit delay
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" ldi %0, 0x80 \n\t"
// bit shift counter
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"WaitStart: \n\t"
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" sbic %[uart_port]-2, %[uart_pin] \n\t"
// wait for start edge
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" rjmp WaitStart \n\t"
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"RxBit: \n\t"
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// 6 cycle loop + delay - total = 5 + 3*r22
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// delay (3 cycle * r18) -1 and clear carry with subi
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" subi r18, 1 \n\t"
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" brne RxBit \n\t"
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" ldi r18, %[rxdelay] \n\t"
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" sbic %[uart_port]-2, %[uart_pin] \n\t"
// check UART PIN
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" sec \n\t"
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" ror %0 \n\t"
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" brcc RxBit \n\t"
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"StopBit: \n\t"
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" dec r18 \n\t"
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" brne StopBit \n\t"
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:
"=r"
(ch)
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: [uart_port]
"I"
(_SFR_IO_ADDR(PORTB)),
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[uart_pin]
"I"
(
UART_RX
),
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[rxdelay]
"I"
(RXDELAY),
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[rxdelay2]
"I"
(RXDELAY2)
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:
"r0"
,
"r18"
,
"r19"
);
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sei();
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#endif
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return
ch;
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}
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#ifdef UART_INTERRUPT
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/* Interrupt handler for the pin change
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*/
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ISR
(PCINT0_vect) {
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uint8_t ch;
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// Make sure it is our pin and it is 0
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if
(!(PINB&(1<<
UART_RX
))) {
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// Start the read (assuming we have the start bit)
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asm
volatile
(
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" ldi r18, %[rxdelay2] \n\t"
// 1.5 bit delay
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" ldi %0, 0x80 \n\t"
// bit shift counter
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"RxBit: \n\t"
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// 6 cycle loop + delay - total = 5 + 3*r22
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// delay (3 cycle * r18) -1 and clear carry with subi
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" subi r18, 1 \n\t"
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" brne RxBit \n\t"
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" ldi r18, %[rxdelay] \n\t"
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" sbic %[uart_port]-2, %[uart_pin] \n\t"
// check UART PIN
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" sec \n\t"
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" ror %0 \n\t"
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" brcc RxBit \n\t"
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"StopBit: \n\t"
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" dec r18 \n\t"
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" brne StopBit \n\t"
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:
"=r"
(ch)
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: [uart_port]
"I"
(_SFR_IO_ADDR(PORTB)),
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[uart_pin]
"I"
(
UART_RX
),
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[rxdelay]
"I"
(RXDELAY),
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[rxdelay2]
"I"
(RXDELAY2)
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:
"r0"
,
"r18"
,
"r19"
);
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// Now put it in the buffer (if we have room)
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if
(g_index<
UART_BUFFER
)
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g_buffer[g_index++] = ch;
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}
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// TODO: Chain on to the user interrupt handler if available.
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}
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#endif
/* UART_INTERRUPT */
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#endif
/* UART_ENABLED */
uartRecv
char uartRecv()
Definition:
uart_recv.c:65
UART_BUFFER
#define UART_BUFFER
Definition:
hardware.h:80
uartAvail
uint8_t uartAvail()
Definition:
uart_recv.c:51
UART_RX
#define UART_RX
Definition:
hardware.h:65
uart_defs.h
softuart.h
ISR
ISR(TIMER1_OVF_vect)
Definition:
systicks.c:170
shared
uart_recv.c
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